[1]United States Patent Office 39302,033 3,302,033 PULSE FORMING CIRCUIT FOR HORIZONTAL DEFLECTION OUTPUT TRANSISTOR Hunter C. Goodirich, Collingswood, N.J., assignor to Radio Corporation of America, a corporation of' Dela. ware Filed Dec. 19, 1962, Ser. No. 245,753 5 Claims. (Cl. 307-88.5) The present invention relates to pulse forming circui@ts for television receivers. More particularly the present invention relates to horizontal deflection circuit arrangements for a transistorized television receiver. Electroma.gnetic deflection circuits in cathode ray tubes require large amplitude, substantially sawtooth shaped current waves for application to the horizontal and vertical deflecting coils. For transistorized television receivers wide angle cathode ray tubes are desirable so as to keep the depth of the receiver as small as possible. The deflection of the electron beam through the wider angle requires that the deflection coils be supplied with even larger amplitude currents than heretofore for narrower an.- le deflection systems. However, this puts an additional burden on the output transistors used in the television receiver. To generate the sawtooth shape, the transistor is varied between its saturated condition when maximum forward current flows and cut off condition wherein no forward current flows. Since the transistor is a bi-directional device it is possible for reverse current to flow therethrough durin@g certain biasing conditions. Heavy reverse current can cause an undesirable amount of heat generation due to the reverse current power dissipation. This can ruin the operating characteristics of the transistor. Accordingly, it is an object of the present invention to p-rovide a new and improved cathode ray tube deflection circuit for a transistorized television receiver. A second object of the present invention is to provide a new and improved transistorized horizontal deflection circuit for a television receiver wherein undesirable biasing conditions for the transistor are substantiallyeliminated. With the above objects in view the present invention isilliustratively embodied in a deflection circuit for a television xeceiver having a blocking oscillator transistor and an output transistor, each of said transistors having base, emitter and cohector electrodes. The blocking oscillator transistot provides output pulses which are a@pplied to the output transistor to altemately render the output transistor conductive and nonconductive. One electrode of the output transistor is connected to the deflecting coils of the television receiver and pulse shaping means are included in series withone of the electrodes of one of the transistors for shapin- the pulses applied to -the output transistor so that the amplitude of the leading ed-ge of the s"baped pulse is substantially higher than that necessary to cut off the output transistor and the trailing ed,-e of the shaped pulse is substantially lower than the amplitude of its leading edge while still being higher than necessary to maintain the output transistor in cut-off condition. The novel features which are considered as characteristic for the invention are set forth in particular in the appended claims. The invention itself, however, both as to its construction and its method of operation to@ether with additional objects and advantages @thereof will best e @understood from the followindescription of specific b embodiments when read in connection with the accompanying drawings in which: FIGURE 1 is a schematic diaaram partially in block form of a television receiver illustrating a horizontal out-put circuit arran.@ement constructed in accordance with the,principles of the present invention; Patented Jan. 31, 1967 2 FIGURE 2 is a graphical representation of the cifrrent waveforms appearing at different points of the circuit of FIGURE 1; FIGURE 3 is a schematic diagram of a second embodiment of the present invention; and FIC-RURE 4 is a graphical representation of current waveforms appearin.- at different poin@ts of the circuit of FIGURE 3. Referrin.- to the drawings and more particularly to 10 FIGURE 1, television signals transmitted from a broadcastin,,a station are picked up by the antenna 10 of the television receiver and applied to the radio frequency (RF) tuner. The block 11 represents the RF tuner, intermediate frequency (IF) amplifier, and video circuits 15 of the television receiver. The operation of the circuits represented by the block 11 are nGt essential forthe understanding of the principles of the present invention and accordingly details thereof are not illustrated in order to avoid unnecessarily complicating the drawing. 20 The apparatus represen-ted by the block 11 demodulates the received television signal and applies the same on conductor 12 to a sound channel 13; on conductor 14 to a cathode ray tube 16 and on conductor 17 to a synchronizin@g signal separator 18. The sound channel -represented 25 by the block 13 reproduces the audio information contained in the signal in synchronism with the displayed video signal. The cathode ray tube 16 reproduces the image represented by the television video si,-nal and the synchronizing 30 signal separator separates the vertical and horizontal synchronizing signals which are present in the received television signal. The vertical synchronizing signal is applied from the sync separator 18 to the vertical deflection circuit 19 and synchronizes the generation of generally saw35 tooth shaped pulses Nvhich are prod@uced at the output terminals 21 of the circuit 19 and applied to the vertical deflection coils V-V of the cathode ray tu e The sound channel, synchronizing signal separator and vertical deflection circuits may each be constructed in a.ny 40 one of several conventional configurations to carry out its respective function. Again, complete details of these circuits are not illustrated in order to avoid unnecessarily complicating the drawings. The horizontal synchronizing signals are applied on a 45 conductor 22 to a winding 23 of a blocking oscillator transformer 25. These horizontal synchronizing pulses have a generally square wave configuration as indicated in FIGURE 2, waveform 24. r'O In FIGURE 1 the primary winding 23 is shown connected in series with the base electrode of a blocking oscillator transistor 26. Transistor 26 is illustrated as a PNP transistor having its emitter electrode connected to ground potential by means of a frequency determining parallel resistor-capacitor network 27. 55 The collector electrode of the transistor 26 is connected by means of a second winding 28 of transformer 25 and a parallel resistor-capacitor network 29 to the negative terminal 31 of a source of operating potential (not illustrated) which has its positive terminal grounded. 60 In addition, the transformer 25 has a third winding 32 which is @connected by means of conductors 33 and 34 to opposite ends of a resistor 36. One side of resistor 36 is connected to one terminal of a bias battery 37, the other terminal of which is connected to ground potential. 65 The other side of resistor 36 is connected to the base electrode of the output transistor 38, the emitter electrode of which is connected directly to ground potential. The collector electrode of the transistor 38 (shown as a PNP 70 type) is connected to the negative terminal 35 of the operating potential source for the television receiver by means of a capacitor 39. The terminals of the capacitor
[2]3,302,033 3 are connected by conductors 41 and 42 directly across the horizontal deflecting coils H-H of the cathode ray tube 16. The sawtooth shaped currents for the horizontal deflection coils H-H are produced by @he alternate conduc5 tion and non-conduction of the output - transistor 38. This transistor is operated as a switch. During the trace portion of the horizontal deflection cycle the ne-ative terminal of the source of operating potential ana the ne,@ative portion of the pulses applied to the base of the 10 transistor 38 forward biases the transistor and causes curent to flow through the collector-emitter circuit by way of the horizontal deflection coils H-H. The current through the coils will increase in a linear manner with time until a pulse of positive polarity is applied 15 to the base of the transistor 38 from the blockin,@ oscillator transistor 26. This will cut off current in the emitter-collector circuit of the transistor 38 so that the energy stored in the horizontal deflection coils H-H will discharge through the capacitor 39 in a half-wave 20 oscillatory manner durin- the retrace portion of the horizontal deflection cycle. When the positive pulse applied to the transistor 38 is terminated the forward bias conditions will be restored on this transistor to close the circuit which includes the 25 transistor and the deflection windings H-H. The operating cycle is then repeated. Accordingly, the deffecti.on arran,@ement including the transistor 38 generates a sawtooth current wave for horizontally deflectin-. the electron beam of the cathode ray 30 tube 16. The operating cycle just described refers to substantially the last half of the horizontal scan cycle and the retrace interval. In accordance with re,,tction scanning principles, the first half of the reaction scanning cycle occurs during conduction of the damper diode 35 which has not been illustrated, since for the purposes of this application, it operates in its usual manner. As pointed out above the transistor 38 acts as a switch. The stidden collapse of the magnetic field about the horizontal deflection windings during the retrace portion of 40 the deffection cycle prodtices undesirable reverse high voltage conditions on transistor 38. The - combination of the positive cut-off potential on the base electrode of the transistor 38 and the high voltage negative fly back pulse produced durin.- this retrace interval can cause a break- 45 down of the base emitter diode of transistor 38 in the reverse direction. This in turn caiises a channeling effect of current between the collector and emitter electrodes, thus producing undesired power dissipation and local heating in the transistor to affect adversely its operating 5( characteristics. The arrangement of the blocking oscillator transistor 26 and the output transistor 38 of FIGURE I operates to reduce substantially the undesirable reverse bias conditions present on the transistor 38 during the retrace inter- 55 val. In operation, the negative pulses 24 applied from the sync separator 18 to the base electrode of transistor 26 initiates conduction in this transistor. Collector current in transistor 26 starts to flow upon the application of the 60 leading edge of the waveform 24, substantially all of the current initially flowing through the capacitor of the parallel combination 29. As the capacitor becomes charged by the current flow most of the collector current flows through the resistor of the parallel combina- 65 tion 29. The resulting wave shape produced in the winding 32 is illustrated by the wavefonn 43 of FIGURE 2. It can be seen that the leading edge of the wayeform 43 is substantially higher in amplitude than the remaining portion thereof. This is due to the fact that the 70 impedance of the capacitor in the parallel network 29 during the rise time of the pulse 24 is substantially lower thaii the resistance of this network. The waveform 43 applied by means of the winding 32 to the base electrode of the output transistor 38 cuts this 75 4 transistor off. The bias source 37 and the circuit constants are chosen so that the large initial amplitude of the leading edge of the waveform 43 is substantially higher than the potential necessary to cut off the transistor 38. The remainder of the waveform 43 incltiding its trailin@ edge is lower in amplitude but is still sufficiently large to maintain transistor 38 in nonconductive condition. This arrangement achieves the advantage of very rapid turn off of the transistor 38. The carriers must be swept out from the base of the transistor in order to cut the transistor off. The higher the amplitude of the positive cut off pulse, the quicker the carriers will be swept out from the base. This produces the sharp decrease in the collector current of the transistor 38, corresponding to the retrace portion of the sawtooth waveform. The shape of the collector current w;ll be discussed further with resp--ct to the second embodiment of the present invention. Thus it is seen that the transistor 38 is rapidly turned off by the hi-h amplitude leading ed@e of the wavef<)rm 43 and maintained in cut off condition at the substantially lower potential. The flyback pulse produced by the collapse of the magnetic field about the horizontal coils H-H does not develop tintil the collector current has substantially reached zero. It can be seen from FIGURE 2 that the flyback pulse, which is the large negative pulse of the waveform 44, does not occur until after the lower potential of the waveform 43 is reached. As pointed out above, this pulse corresponds to the half wave oscillatory discharge through capacitor 39. Accordin.-ly, the possibility of base emitter diode breakdown is kept to a minimum by having the high amplitude necessary for rapid turn off of the transistor 38 confined to a small portion of the pulse applied to the base of the transistor 38. The large flyback pulse does not appear until after the leading ed@e of the waveform 43. Therefore, the possibility of the channelin@g of a large amount of collector-emitter current is reduced to a minimum. It can be seen that, by utilizing the principles of the present invention, a large amount of power dissipation in the output transistor is avoided. This is particularly applicable when the output transistor has a relatively lower reverse breakdown voltage. Referring now to FIGURE 3 a second embodiment of the present invention is illustrated. In this figure only that portion of the circuit connected to the synchronizing signal separator 18 is illustrated. The circuit may otherwise be the same as that shown in FIGURE 3. Also, in order to simplify the illustratedcircuitry, it was assumed in the description of FIGURE I that the blocking @oscillator was trig.-ered directly by pulses derived from the sync separator 18. In -actual practice the blocking oscillator may be tri-gered by signals derived from a phase detector and integrating circuit. The pbase detector relates the current flowing through the horizontal deflecting coils to the synchronizing signal to be sure that the output of the blocking oscillator is properly phased. In FIGURE 3 is shown the phase detector 30 connected to the input of an inte-rating circuit 40. The output from the integrating circuit 40 is connected by means of a conductor 22' to a winding 53 of a transformer 50. The winding 53 is connected in series with the base of the blocking transistor 51. Operatin.a bias for the base electrode of the transistor 51 is provided by the resistor 81 and direct current potential source 82 which are connected to the conductor 22'. The emitter electrode of the transistor 51 is connected to ground by means of the parallel combination of a resistor 54, capacitor 56 and the series combination of a capacitor 57 and an inductor 58. This parallel combination determines the selfoscillation frequency of the blocking oscillator. The actual repetition rate is determined by the repetition rate of the synchronizing signals 24 (FIGURE 2).
[3]5 Connected in series between the collector electrode Of the transistor 51 and the negative terminal 31' of the source of direct current operating potential is a second winding 59 of the transformer 50. Coupled to this winding is the output winding 61 of the transformer 50 having one of its ends connected to ground potential by means of a parallel combination 62 of a resistor and capacitor. The other end of winding 61 is connected to the base electrode of an output transistor 52 by means of an inductor 63. The emitter electrode of the transistor 52 is connected to ground by the parallel combination 83 of a resistor and capacitor. Its collector electrode is connected by means of a conductor 64 to one end of the horizontal yoke made up of coils 84 and 86. Connected in series with the horizontal yoke and the negative termianl 35' of a source of direct current is a winding 87. Connected -across the yoke coils 84-86 and winding 87 is a charging capacitor 39'. Adjacent the winding 87 is a pick up winding 88 that is connected between ground potential and the phase detector 30. A resistor 89 is connected across the winding 88. As indicated above, in the illustrated embodiment sawtooth current through the yoke windin-gs is used as a ph-ase reference and is applied to the phase detector 30 by means of the winding 88. The phase detector @also has the synchronizing signals applied thereto fromthe sync separator 18. Therefore, the superposition of the signals applied to the phase detector 30 appear as shown by the w-aveform adjacent the box 30 as the sawtooth current wave 91 and the sync pulse 92 shown in dotted lines. The phase detector 30 and integrating circuit 40 are circuits which are known in the art and operate to provide pulses for properly synchronizing the operation of the blocking oscillator transistor 51. One such known arrange@ment is described in United States Patent No. 2,344,810, G. L. Fredendall et al., March 24, 1944. In operation the blocking oscillator transistor 51 produces rectangular output pulses in the output windings 61 of the transformer 50 at a repetition rate determined by the output of the integrating circuit 40 applied on input conductor 22'. Such blocking oscillator output -pulse is represented by the wweform 67 of FIGURE 4. To illustrate the advantageous effect of the induct<)r 63 the solid line waveforms in FIGURE 4 represent the various currents and voltages of the transistor 52 without the inductor 63 being connected in the circuit. The dofted line waveforms of FIGURE 4 illustrate the respective currents and voltages with the inductor connected as shown. Accordingly, when the leading edge -of the square wave 67 is applied at time t, without the inductor present, the base current flow is represented by the waveform 68. Since the transistor 52 is operating in saturated condition just prior to the application of the pulse 67, it continues to act as a closed switch for the time intervals 11 to t2. During this time interval, excess stored carriers are removed from the transistor 52. Accordingly, the collector current represented by the waveform 69 continues to irtcrease as before. The flyback pulse does not start to develop until the collector current 69 starts to cut off. However, once cut-off begins, it must be completed as quickly as possible as pointed out hereinabove. The cut-off time is approxi.mately inversely proportional to the reverse voltage applied to the base of the transistor 52 during this time interval. It can be seen that the base voltage represented by the dotted line 71, with inductor 63 connected as shown, is substantially increased as compared to wave,form 67 during the time interval t,2 to t3 which is the critical cut-off time intreval. The additional voltage on the base electrode of the transistor 52 is produced by the superposition of the voltage due to the square wave 67 @and the voltage developed across the inductor 63. Such developed voltage is represented in FIGURE 4 by the waveform 72. 3,302,033 6 It is clear from a comparison of the solid and dotted lines of FIGURE 4 that the addition of the inductor 63 achieves much faster cut-off time for the transistor 52. Also, this increased reverse base voltage is no longer present when the flyback pulse illustrated in FIGURE 4 by waveform 70 is produced. The flyback pulse 70 is developed primarily between the time interval t3 and t4. The possibility of reverse base-emitter breakdown and the abovementioned channeling of collector-emitter cur10 rent is thereby substantially eliminated. In the automatic phase controlled system shown in FIGURE 3, the phase reference is taken from the yoke sawtooth current 91. Therefore if any delay in the flyback operation is added by the introduction of the induc15 tor 63 in the base circuit of the transistor 52, such delay will be compensated for by a shifting in phase of the output of the blocking oscillator. Therefore, its output pulses may actually precede the incoming horizontal synchronizing pulses. Such phase relationship is shown in FIG20 URE 4 by the waveform 80 -may thus occur after the leading edge of the waveforin 67, In the embodiment of FIGURE 3 the use of the inductor 63 also helps to improve the -oscillation of the blocking oscillator transistor 51. This oscillator operates between 25 on and off conditions with the greatest dissipation in this transistor occurring during the tum on transition. The faster the transistor 51 is turned on the lower will be the dissipation therein. If the transistor 51 is heavily loaded, the turn on time is increased by a substantial amount. 30 The presence of the inductor 63 momentarily decouples loading on transistor 51 due to transistor 52 and gives a much faster oscillator rise time. It is apparent that the utilization of the circuits set forth herein will substantially improve the operation of 35 the t-ransistors by reducing the power dissipated in the transistor and providing a more efficient operation and longer life. What is
